FPGA Routing Engine
SoftJin’s FPGA Routing Engine is a Timing driven Routing Engine for island based FPGA architectures. It is a fast, cross-platform Router that meets the timing goals, while optimizing the use of Routing Resources of the FPGA. SoftJin's Routing Engine is a core EDA component that can be used by FPGA vendors to offer a customized, best-in-clasee Routing Engine as part of their tool suite to the FPGA users.The Routing Engine has been designed to support the following FPGA architecture:
- Homogeneous logic blocks
- Island type architecture with logic blocks embedded in a sea-of-interconnects
- Cluster based organization of functional/logic elements in a logic block
- Non-hierarchical interconnect structure
- Segmented routing architecture with switch boxes.
SoftJin's FPGA Routing Engine
- Timing driven - The routed circuit meets the timing constraints and at the same time minimizes the congestion.
- Well Defined Interfaces to easily integrate into the design flow
- Reads the Routing Architecture, Placement Information, Synthesized Netlist information and the Timing constraints using well-defined Interfaces.
- Writes the Routing Information, modified Netlist and the Timing Information using well defined interfaces.
- Generates Rich routing reports with statistics about the Routed design.
- Allows permutations of logically equivalent input pins of logic block in order to reduce congestion and optimize timing.
- Interfaces with SoftJin’s Static Timing Analysis Engine through a well defined interface. Can also be integrated with other third party STA Engine.
- Accepts various control parameters to control the Run-time behavior of the Router.