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- Why choose SoftJin
- Current Openings
Current Openings
SoftJin is a growing Electronic Design Automation (EDA) software and FPGA Design and Verification solutions company. SoftJin has a hybrid business model composed of mix of high-end R&D Services and differentiated Software Products. The outsourced R&D services are targeted to the Semiconductor Design and Manufacturing companies and include EDA software development, High Performance FPGA Design and Hardware Verification services. SoftJin's EDA Products are in the area of Post Layout Data Processing and EDA tools for next generation of FPGAs and other Programmable Platforms.In order to drive our growth plans, we are looking to expand our team. Currently, we have openings in the following technology areas:
- Synthesis, Placement, Routing and Timing Analysis Engines for next generation of FPGAs and other Programmable Platforms
- Post Layout EDA including Design-For-Manufacturing (DFM) tools for new semiconductor process technologies
- Design and Verification IP blocks, Reference Designs and FPGA based Application Development
Openings
- Project Leader/ Technical Leader
EDA Software Development - Project Leader/ Technical Leader (Job code SJ-PLE)If you like to
- Create specifications & Design of EDA Software
- Involve in implementation of EDA Software
- Be responsible for project management & Delivery of projects to customers
- Be part of a high energy team focused on full life-cycle development
- Continually learn, mentor and develop your career
- Work in highly collaborative teams that strive to build quality code and provide business value
And you have- Around 5 years of working experience of developing large software with complex data structure
- Expertise in efficient algorithm and data structure design
- In depth knowledge of C/C++ programming, understanding of OOD&A concepts
- Good communication and interpersonal skills
- Qualification: Ph.D. / M.Tech / M.S. / M.E. / B.Tech / B.E. in CSE/EE
- Good understanding of the EDA tool flow
- Working knowledge of Software Development Processes (ISO9000)
- Experience in managing a small team of 5-8 engineers
- Domain experience in developing any one of the following: System Level Design Tool/ Logic Design Tool/ Physical Design Tool/ Computational Geometry, Compiler/ System Software Development
- Project Leader - EDA Software Lifecycle Management
EDA Software Development - Project Leader - EDA Software Lifecycle Management (Job code SJ-PLM)If you like to
- Improve Quality of EDA Tools and Tool Flows
- Get Involved in Setting up and management of highly automated test and regression environments
- Get Involved in Creation and ongoing enhancement of Test suites composed of Digital designs
- Benchmark quality and performance of Software
- Manage Software Releases in a dynamic software development environment
- Work in highly collaborative teams that strive to build quality code and provide business value
And you have- 6+ years of working experience of developing or doing Quality Assurance of large and complex software
- In depth knowledge of scripting languages (Perl, Tcl/Tk)
- Good understanding of the digital design flow
- Grasp of Hardware Description Languages like Verilog and/or VHDL
- Good knowledge of Configuration Management tools like SVN, Clearcase
- Good analytical, communication and documentation skills
- Qualification: M.Tech / M.S. / M.E. / B.Tech / B.E. in CSE/EE
- Experience in managing a team of 5-7 engineers
Also Desired Skill- Experience in using tools like Modelsim, Synplify, Magma, Xilinx - ISE etc
- Senior Software Engineer
EDA Software Development - Senior Software Engineer (Job code SJ-SSE)If you like to
- Create specifications & Design of EDA Software
- Involve in implementation of EDA Software
- Be responsible for project management & Delivery of projects to customers
- Be part of a high energy team focused on full life-cycle development
- Continually learn, mentor and develop your career
- Work in highly collaborative teams that strive to build quality code and provide business value
And you have- Around 3 years of working experience of developing large software
- Expertise in efficient algorithm and data structure design
- In depth knowledge of C/C++ programming, compiler construction tools (lex/yacc), understanding of OOD&A concepts, scripting languages (Perl, Tcl/Tk)
- Good understanding of the digital design flow
- Good communication and interpersonal skills
- Qualification: M.Tech / M.S. / M.E. / B.Tech / B.E. in CSE/EE
- Working knowledge of Software Development Processes (ISO9000)
Also desired Skill- Domain experience in developing any one of the following: System Level Design Tool/ Logic Design Tool/ Physical Design Tool/ Computational Geometry, Compiler/ System Software Development
- Good Knowledge of Open Access, Milkyway or other physical design databases
- Engineer - Software Lifecycle Management
EDA Software Development - Engineer - Software Lifecycle Management (Job code SJ-SLE)If you like to
- Improve Quality of EDA Tools and Tool Flows
- Get Involved in Setting up and management of highly automated test and regression environments
- Get Involved in Creation and ongoing enhancement of Test suites composed of Digital designs
- Benchmark quality and performance of Software
- Manage Software Releases in a dynamic software development environment
- Work in highly collaborative teams that strive to build quality code and provide business value
And you have- Around 3 years of working experience of developing or doing Quality Assurance of large and complex software
- In depth knowledge of scripting languages (Perl, Tcl/Tk)
- Good understanding of the digital design flow
- Grasp of Hardware Description Languages like Verilog and/or VHDL
- Good knowledge of Configuration Management tools like SVN, Clearcase
- Good analytical, communication and documentation skills
- Qualification: M.Tech / M.S. / M.E. / B.Tech / B.E. in CSE/EE
- Experience in managing a small team of 2-3 engineers
- CAD Engineer
EDA Software Development - CAD Engineer (Job code SJ-CAD)You will be responsible for
- Working with several 3rd party tools such as Magma's Blast Create SA, STARRC, PrimeTime and Conformal in implementing and testing design flows and integration of these tools with other design tools
- Implementing scripts, running various types of designs (test cases, benchmark designs and customer designs) through one or more steps in the design flow
- Running regressions on new releases of internal and external tools, and reporting on the variance
Required Skill- Qualification: M.Tech / M.S. / M.E. / B.Tech / B.E. in CSE/EE
- 2-3 years of experience in FPGA or ASIC design flow
- Familiarity with one or more of the following tools - Synthesis tools such as Magma BlastCreate, Synopsys Design Compiler; Timing Analysis tools such as PrimeTime; Extraction tools such as STARRC; Formal verification tools such as Conformal / Formality
- Experience with Tcl scripting language
Desired Skill- Experience with BlastCreate SA
- Experience with FPGA design tools such as Xilinx ISE, Altera Quartus, Synplicity or Mentor Graphics tools
- Experience with other scripting languages such as PERL
- Synthesis Engineer
EDA Software Development - Synthesis Engineer (Job code SJ-SYE)You will be responsible for
- Working on developing a Synthesis solution
- Enhancing existing modules, fixing bus and developing new modules
Required Skill- Have M.Tech / M.S. / M.E. / B.Tech / B.E. in CSE/EE
- Strong algorithm, datastructure knowledge
- Proficiency in C++ and OOAD
- Good knowledge of RTL Verilog
Desired Skill- Prior experience in Synthesis and Verilog/ Vhdl FEs
- Project Lead/ Manager
Hardware Design and Verification - Project Lead/ Manager (Job code SJ-PLF)If you like to
- Be expertise in HDL (Hardware Description Language), VHDL& Verilog
- Strengthen fundamentals of digital design
- Expertise in FPGA (Field Programmable Gate Array) design & implementation
- Be part of a high energy team focused on full life-cycle development
- Continually learn, mentor and develop your career
- Work in highly collaborative teams that strive to build quality code and provide business value
And you have- Rround 5-8 years of relevant working experience
- Proficiency in HDL (Hardware Description Language),VHDL& Verilog
- Strong fundamentals of digital design
- Experience in FPGA (Field Programmable Gate Array) design & implementation
- Experience in XILINX or Alterra FPGA Design Flow
- Experience in developing Design IP's
- Design experience in the area of networking
- Experience in managing a small team of 5-7 engineers
- Good communication and documentation skills
- Qualification: M.Tech / M.S. / M.E. / B.Tech / B.E. in CSE/EE
- Senior Design Engineer/ Senior Hardware Verification Engineer
Hardware Design and Verification - Senior Design Engineer/ Senior Hardware Verification Engineer (Job code SJ-SDE)If you like to
- Be expertise in HDL (Hardware Description Language), VHDL& Verilog
- Strengthen fundamentals of digital design
- Expertise in FPGA (Field Programmable Gate Array) design & implementation
- Be part of a high energy team focused on full life-cycle development
- Continually learn, mentor and develop your career
- Work in highly collaborative teams that strive to build quality code and provide business value
And you have- Around 4-5 years of relevant working experience
- Proficiency in HDL (Hardware Description Language),VHDL& Verilog
- Strong fundamentals of digital design
- Experience in FPGA (Field Programmable Gate Array) design & implementation
- Experience in XILINX or Alterra FPGA Design Flow
- Experience in developing Design IP's
- Design experience in the area of networking
- Experience in managing a small team of 2-3 engineers
- Good communication and documentation skills
- Qualification: M.Tech / M.S. / M.E. / B.Tech / B.E. in CSE/EE
- Design Engineer/ Hardware Verification Engineer
Hardware Design and Verification - Design Engineer/ Hardware Verification Engineer (Job code SJ-DE)If you like to
- Be expertise in HDL (Hardware Description Language), VHDL& Verilog
- Strengthen fundamentals of digital design
- Expertise in FPGA (Field Programmable Gate Array) design & implementation
- Be part of a high energy team focused on full life-cycle development
- Continually learn, mentor and develop your career
- Work in highly collaborative teams that strive to build quality code and provide business value
And you have- Around 2-3 years of relevant working experience
- Experience in XILINX or Alterra FPGA Design Flow
- Experience in developing Design IP's
- Experience in developing Verification IP's
- Strong fundamentals of verification methodologies
- Good communication and documentation skills
- Qualification: M.Tech / M.S. / M.E. / B.Tech / B.E. in CSE/EE
A. EDA Software Development
B. Hardware Design and Verification