JPEG Encoder
SoftJin’s JPEG encoder IP is a high performance solution and capable of encoding Still Images as well as Video stream with SD, VGA and HD resolution. JPEG compression is used to achieve good compression ratio without perceptible deterioration of image quality, especially for images where there is smooth variation in tone and color.
SoftJin’s JPEG Encoder IP has been silicon proven on FPGA (Xilinx, Altera) platforms.
SoftJin’s JPEG Encoder IP has been silicon proven on FPGA (Xilinx, Altera) platforms.
Key Features
- Supports baseline ISO/IEC 10918-1 standard
- Uses 8x8 two dimensional fixed point DCT
- Configurable Huffman and Quantization table
- Takes YCrCb as well as RGB input formats
- Supports color components in 4:4:4, 4:2:2 and 4:2:0 formats
- While running at 100 MHz, JPEG Encoder can compress
- VGA frame (640 x 480) in 9.2 ms
- SD frame (720 x 576) in 12.4ms
- HD frame (1920x1080) in 63.2 ms
- 3 MP image in 94.3 ms
- In an example implementation JPEG Encoder consumed 4234 LUTs and 2572 FF on Virtex5 device and tested to run at 136 MHz clock frequency
Figure 1 below illustrates the internal architecture of the IP.
Fig 1: Internal Architecture of JPEG EncoderSample Application Areas
- Surveillance System
- Traffic monitoring system
- High resolution Digital camera and camcorder
- Office automation equipment like printers, scanners, digital copiers etc
- Medical imaging systems
- Video conference and display-projection systems
License Models and Deliverables
The IP can be licensed in source code as well as Netlist format. In source code format the deliverables are
- Verilog code
- Bit and cycle accurate C model
- Test Benches
- Data sheet and Integration document
- Netlist compatible with Xilinx, Altera or other FPGA devices
- Test Benches
- Data sheet and Integration document
For more information about JPEG encoder please click here to download the PDF.
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